Author : IEEE Computer Society
Publisher : IEEE Computer Society
Page : 305 pages
File Size : 41,7 Mb
Release : 1995
Category : Fault-tolerant computing
ISBN : 0818671076
Proceedings, the IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems, November 13-15, 1995, Lafayette, Louisiana by IEEE Computer Society Pdf
An invited talk recounts Intel's experience with increasing die yield through CAD algorithms, and a panel discussion examines tools for the extracting of critical areas for a yield analysis of VLSI design. Others of the 34 papers cover critical area analysis, defect sensitivity and reliability, fault tolerant architectures and arrays, yield projection and enhancement, fault tolerant and testing techniques, and self-checking and coding techniques. No subject index. Annotation copyright by Book News, Inc., Portland, OR